1. Field of the Invention
Systems and methods consistent with the present invention broadly relate to data processing. More particularly, the present invention relates to a data processing system and method for executing a loop by dividing a loop contained in a program into at least three phases based on whether data are exchanged between a loop accelerator and a central register file and differently configuring an array of the loop accelerator for the respective loop phases.
2. Description of the Related Art
FIG. 1 depicts a conventional data processing system.
The conventional data processing system 10 includes a processor core 11, a central register file 12, and a loop accelerator 13. Typically, the conventional data processing system 10 controls the loop accelerator 13 to promptly execute a loop in a program and controls the processor core 11 to execute other tasks of the program. In this case, the loop accelerator 13 and the processor core 11 may be configured to transfer data to each other by sharing the central register file 12.
The conventional loop accelerator 13 processes data by differently configuring an array 13a which consists of a plurality of data processing cells C11 through C34, according to a set of configuration bits corresponding to a currently executed loop amongst sets of configuration bits stored in a configuration memory 13b. The configuration of the array 13a is mainly adapted such that it does not change during the executing of one loop. Even when the configuration of the array 13a is altered during the execution of one loop, no consideration is given at all to the change of the configuration of the array 13a based on whether the data are exchanged between the central register file 12 and the loop accelerator 13.
In such a conventional data processing method, in order to access the central register file 12 and route live-in values or loop invariant values read from registers R3 and R4 to the data processing cells C22 and C14 which require the values, the loop accelerator 13, as shown in FIG. 1, constantly occupies the data processing cells C13 and C23 as routing resource of the live-in values or the loop invariants throughout the loop execution. Likewise, to deliver a live-out value from the data processing cell C32 to the register R1 of the central register file 12, the loop accelerator 13 constantly occupies the data processing cells C11 and C12 as the routing resource throughout the loop execution.
As such, even when it is not necessary to deliver the live-in and live-out values between the central register file 12 and the loop accelerator 13, the routing resource is occupied unnecessarily. This results in congestion and in limiting applications which use the loop accelerator 13. Therefore, the performance of the data processing system is degraded.